Heterogeneous Integration of III-V Devices and Si CMOS on a Silicon Substrate

The future of integrated circuits will include the integration of high performance III-V electronic and/or opto-electronic devices with standard Si CMOS to create to a new class of highly integrated, high performance, ‘intelligent’, mixed signal and RF circuits. While traditional hybrid approaches, such as wire bonded or flip chip multi-chip assemblies may provide short term solutions, the variability and losses of the interconnects and the limitation in the placement of III-V devices relative to CMOS transistors will limit the performance and utility of these approaches. A more attractive approach is the direct integration of CMOS and III-V devices on a common silicon substrate. In this way circuit performance can be optimized by selecting the ‘best junction for the function’ and strategically placing III-V devices adjacent to CMOS transistors and cells. The devices and subcircuits can be interconnected using standard semiconductor on-wafer interconnect processes.